Maksim Jenihhin

Publications

NURSE: A Distributed Architecture for Runtime Fault Management in Processor Designs
Authors: Santhosh, Ashwin; Jutman, Artur; Kaja, Endri; Ecker, Wolfgang; Jenihhin, Maksim
Year: 2026
Journal / Periodical: 2026 IEEE 17th Latin American Circuits and System (LASCAS)
Authors: Mohammad Hasan Ahmadilivani, Josie E. Rodriguez Condia, Maksim Jenihhin, Matteo Sonza Reorda
Year: 2026
Journal / Periodical: IEEE Access
Authors: Mousavi, Seyedhamidreza; Ahmadilivani, Mohammad Hasan; Raik, Jaan; Jenihhin, Maksim; Daneshtalab, Masoud
Year: 2026

Projects

Year: 2026 - 2029
The overall aim of the Thematic R&D Programme project SPARK-CHIP is to strengthen the R&D capacity, training and cooperation in TalTech and TKK School of Applied Sciences and to foster business-oriented R&D collaboration with Electronics Industry Association and Metrosert Chip Centre in the field of AI chip design. The scientific scope of the project is defined in close cooperation with two innovative Estonian technology companies: Skeleton and Imaginal Microsystems that will monitor the progress of R&D within the project. The project aims at development of a novel platform for cost-effective parametrizable and reliable system-on-chip cores for AI accelerators, supporting emerging AI models and validating it in real silicon. The research builds on TalTech’s previous results in the area of reliable AI chips design and it contributes to advancing the Estonian ICT hardware ecosystem by gaining strategic knowledge on AI deployment on hardware as well as on chip design and production.