IJTAG-compatible Symptom-based SEU Monitors for FPGA DNN Accelerators
FORTUNE: A Negative Memory Overhead Hardware-Agnostic Fault TOleRance TechniqUe in DNNs
ETAGi välisteaduskoostöö toetusmeetmete mõju. Kvalitatiivuuringu tulemused
Special Session: Reliability Assessment Recipes for DNN Accelerators
Techniques for Building Reliable and Energy-efficient Hardware Accelerators For Dynamic Deep Neural Networks
Techniques for Reliability in Edge-AI Chips
Special Session: In-Field ML-Assisted Intermittent Fault Localization and Management in RISC-V SoCs
Zero-Memory-Overhead Clipping-Based Fault Tolerance for LSTM Deep Neural Networks
The optimization, design and performance of the FBCM23 ASIC for the upgraded CMS beam monitoring system
Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators
SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators
Cross-layer Bayesian Network for UAV Health Monitoring
Architectural Solutions for High-Speed Data Processing Demands of CERN LHC Detectors with FPGA and High-Level Synthesis
An optimized design of delay-and energy-efficient Booth multiplier